works 29f0x0 format
This commit is contained in:
+53
-33
@@ -14,7 +14,8 @@ m_offsets
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flashoppreamble = 6
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flash_lockchip = 9
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flash_unlockchip = 12
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flash_idstr = 15
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flash_wait_unit = 15
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flash_idstr = 18
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; rw section, may be moved to ZP if needed
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M_VECTOR .word 0
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@@ -29,7 +30,7 @@ m_iter .byte 0
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; 39sf0x0 protokol 5555/AA;2aaa/55
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; 29f0x0 protokol 555/AA;2aa/55
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; Working scan order; scanning from the end;
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M_CHECK_VECS .word M_VECTORS_29F, M_VECTORS_39SF, M_VECTORS_28SF
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M_CHECK_VECS .word M_VECTORS_39SF, M_VECTORS_29F, M_VECTORS_28SF
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; --------------------------------------------------------------------
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;Problems to solve with writing:
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@@ -61,13 +62,13 @@ M_CHECK_VECS .word M_VECTORS_29F, M_VECTORS_39SF, M_VECTORS_28SF
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; this fails only when somebody stores vendor and product bytes
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; at the proper cells.
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;
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; then in the code we call lda #offset/jsr jsrtovetorproc
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; then in the code we call lda #offset/jsr jsrtovectorproc
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check_type
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ldy #(2*(num_mems-1))
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?again
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sty m_iter
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; store default values
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sta $d500,x
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jsr flashsetbank
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lda $a000
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sta m_vendor
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lda $a001
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@@ -75,7 +76,7 @@ check_type
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jsr jsrtosoftidentry
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sta $d500,x
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jsr flashsetbank
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lda $a000 ; vendor
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cmp m_vendor
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sta m_vendor
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@@ -99,22 +100,26 @@ check_type
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lda M_CHECK_VECS,y
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sta M_VECTOR
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jsrtosoftidexit
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lda #softid_exit
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jsr jsrtovetorproc
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jsr jsrtovectorproc
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lda $d013
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sta $3fa
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clc
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rts
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jsrtosoftidentry
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lda M_CHECK_VECS+1,y ; first is softid entry
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pha
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lda M_CHECK_VECS,y ; first is softid entry
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pha
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php
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rti ; jsr to tabled func
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lda M_CHECK_VECS+1,y ; first is softid entry
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pha
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lda M_CHECK_VECS,y ; first is softid entry
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pha
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php
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rti ; jsr to tabled func
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; PROCEDURE
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; performs jump to vector table at offset in A provided
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; y passed to the procedure called
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jsrtovetorproc
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jsrtovectorproc
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php ; preserve C
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clc
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adc M_VECTOR
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@@ -141,14 +146,9 @@ flashformatchip
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sei
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stx store_x
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; lda #C_FORMAT
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sec
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sec ; will format flash!
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lda #flashoppreamble
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jsr jsrtovetorproc ; does not touch A
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;sta $d502,x
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; !!!!!!!!!!!!!!!!!!! CHECK THIS !!!!!!!!!!!!!!!!!!!!
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;lda #TRIGGER_FORMAT
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;sta $b555 ; FORMAT HERE TRIGGERED!
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jsr jsrtovectorproc ; preserves A
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; not needed to mva $ff flashcmp
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jsr wait4flashcheckresult ; waits for format finished
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; then check number of banks for FFs
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@@ -186,7 +186,7 @@ flashformatsector
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stx flashformatstorex
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sta flashformatstorea
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sei
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sta $d500,x
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jsr flashsetbank
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; store #$a0 or #$b0
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sta flashformataddrcheck + 2
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jsr flashchecksectorformatted
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@@ -197,7 +197,7 @@ flashformatstorex equ * + 1
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; check least sector bit
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sec
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lda #flashoppreamble ; does not touch A,X
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jsr jsrtovetorproc
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jsr jsrtovectorproc
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sta $D500,x
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; A must be either $A0 or $B0
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flashformatstorea equ * + 1
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@@ -215,7 +215,7 @@ flashtmpaddr equ *+1
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sta flashformataddrcheck+2
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ldx flashformatstorex
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sta $d500,x
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jsr flashsetbank
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; check if all data in sector is $ff
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flashchecksectorformatted
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@@ -231,7 +231,7 @@ flashformataddrcheck
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inc flashformataddrcheck + 2
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dey
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bne flashformataddrcheck
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flashsectorformatgood
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jsr flashcartoff
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clc
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@@ -265,9 +265,9 @@ byte_differs
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sta flashcmp
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sei
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pha
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clc ; byte preamble
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clc ; byte program preamble
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lda #flashoppreamble ; preserves A,X
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jsr jsrtovetorproc
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jsr jsrtovectorproc
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pla
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; set right bank
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sta $D500,x
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@@ -276,10 +276,12 @@ byte_differs
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wait4flashcheckresult ; sei mode
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mva #0 flashcnt
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sta flashcnt+1
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ldy #1 ; first time wait short first turn to speed up byte write.
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bne @+
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flashwaitfordone
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; WARNING! 29f040 erases even 10 seconds!
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; approx 100ms in overall for chip erase:
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; as many cycles needed, as 256*cycles >100ms * (1+epsilon)
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; 100 ms is 180000 cycles
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@@ -289,26 +291,38 @@ flashwaitfordone
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; so flipipng values, and adding margin,
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; we count 128*6 cycles in inner loop.
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; max sector erase by datasheet: 25 ms
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; max chip erase by datasheet: 100 ms
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; max chip erase by datasheet: 100 ms 39sf040
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; max chip erase by datasheet: 20 ms 28sf040
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; max chip erase by datasheet: 10000 ms 29f040
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ldy#250
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@ dey
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nop
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@
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;lda #flash_wait_unit
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;jsr jsrtovectorproc
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inc colbaks
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lda colbaks
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sta colbak
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dey
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bne @-
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@ ldy #{ lda.w }
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@
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ldy #{ lda.w }
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jsr flashprocessbyte
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sta flashval
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ldy #{ eor.w }
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jsr flashprocessbyte
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inc flashcnt
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bne @+
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sta $d580
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inc flashcnt+1
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bne @+
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jsr flashcartoff
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lda #$ff ; status
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rts
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@
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and #$40
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bne flashwaitfordone
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sta $d580
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jsr flashcartoff
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flashval equ *+1
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lda #0
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flashcmp equ *+1
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@@ -317,7 +331,7 @@ flashcmp equ *+1
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rts
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flashcnt
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dta 0
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dta 0,0
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; ----------------------
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; PROCEDURE
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@@ -340,6 +354,12 @@ flashsetaddr
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sty flashaddr+1
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rts
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flashsetbank
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sta $d500,x
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lda $d013
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sta $3fa
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rts
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flashcartoff
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pha
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sta $d580
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